CLoadTags


Q&A

  • How it is accessing the tag table without access data memory?
    • call cheri_get_many

Reference 1

// in disas/mips.c

{"cloadtags", "t,+b", 0x4800.07bf, 0xffe0,07ff, 0, 0, I1},

Instruction ISA definition in C:

// target/mips/helper.h

DEF_HELPER_3(cloadtags, tl, env, i32, cap_checked_ptr)

// target/mips/os_helper_cheri.c

target_ulong CHERI_HELPER_IMPL(cloadtags(CPUArchState *env, uint32_t cb, uint64_t cbcursor))

Helper function to access tag table in memory.

// in target/cheri-common/cheri_tagmem.c

int cheri_tag_get_many(CPUArchState *env, target_ulong vaddr, int reg,
        hwaddr *ret_paddr, uintptr_t pc)
// target/mips/translate_cheri.c

static inline void generate_cloadtags(DisasContext *ctx, int32_t rd, int32_t cb)
  --> gen_helper_cloadtags(ttags, cpu_env, tcb, tcbc);


static void gen_cp2 (DisasContext *ctx, uint32_t opc, int r16, int r11, int r6){
    ...
    switch (MASK_CP2(opc)) {
    case OPC_CGET:  /* same as OPC_CAP_NI, 0x00 */
        switch(MASK_CAP6(opc)) {
        /* Two-operand cap instructions. */
        case OPC_C2OPERAND_NI:         /* 0x3f */
            switch(MASK_CAP7(opc)) {
            case OPC_CLOADTAGS_NI:   /* 0x1e << 6 */ ==> 0x11110 << 6 = 0b111.1000.0000 = 0x780
                check_cop2x(ctx);
                generate_cloadtags(ctx, r16, r11);
                opn = "cloadtags";
                break;
            ...
            }
        }
        ...
    }

// target/mips/translate.c

enum {
    /* Two Operand Instructions */
    ...
    OPC_CSEALENTRY_NI   = OPC_C2OPERAND_NI | (0x1d << 6),
    OPC_CLOADTAGS_NI    = OPC_C2OPERAND_NI | (0x1e << 6),
    OPC_CLOADCOLORS_NI    = OPC_C2OPERAND_NI | (0x1e << 6),
};

// OPC_C2OPERAND_NI

/* Version 1.17 and 1.22 ISA encodings (*_NI) to replace above. */
enum {
    /* Common new ISA encoding blocks */
    /* non-immediate capability instructions */
    OPC_CAP_NI          = OPC_CP2 | (0x00 << 21),
    /* 2-operand capability instructions */
    OPC_C2OPERAND_NI    = OPC_CAP_NI | (0x3f),
    /* 1-operand capability instructions */
    OPC_C1OPERAND_NI    = OPC_C2OPERAND_NI | (0x1f << 6),
};


enum {
    //...
    OPC_CP0      = (0x10 << 26),
    OPC_CP1      = (0x11 << 26),
    OPC_CP2      = (0x12 << 26),
    OPC_CP3      = (0x13 << 26),
    //...
    
    /* Load and stores */
    OPC_LDL      = (0x1A << 26),
    OPC_LDR      = (0x1B << 26),
    OPC_LB       = (0x20 << 26),
    OPC_LH       = (0x21 << 26),
    OPC_LWL      = (0x22 << 26),
    OPC_LW       = (0x23 << 26),
    OPC_LWPC     = OPC_LW | 0x5,
    OPC_LBU      = (0x24 << 26),
    OPC_LHU      = (0x25 << 26),
    OPC_LWR      = (0x26 << 26),
    OPC_LWU      = (0x27 << 26),
    OPC_SB       = (0x28 << 26),
    OPC_SH       = (0x29 << 26),
    OPC_SWL      = (0x2A << 26),
    OPC_SW       = (0x2B << 26),
    OPC_SDL      = (0x2C << 26),
    OPC_SDR      = (0x2D << 26),
    OPC_SWR      = (0x2E << 26),
    OPC_LL       = (0x30 << 26),
    OPC_LLD      = (0x34 << 26),
    OPC_LD       = (0x37 << 26),
    OPC_LDPC     = OPC_LD | 0x5,
    OPC_SC       = (0x38 << 26),
    OPC_SCD      = (0x3C << 26),
    OPC_SD       = (0x3F << 26),
};

ISA instruction

ISAv7

CLoadTags rd, cb

| Bit | size | value | |—–|——|——-| | 31-26 | 6 | 0x12 | | 25-21 | 5 | 0x00 | | 20-16 | 5 | rd | | 15-11 | 5 | cb | | 10-6 | 5 | 0x1E | | 5-0 | 6 | 0x3F |


  1. reference ↩
Created Jun 4, 2020 // Last Updated May 18, 2021

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