Reference 1
Most influential: Africa(Kenya) zebra tracking; peer-to-peer epidemic propagation; energy saving.
RC circuits: capacitor discharged time.
This work: a sequential discharged chain of RC circuits instead of one.
Avoid all NVM-writes by taking checkpoints that reside entirely in SRAM.
SRAM volatility: ~5 minutes (20 C)
Long time off times: predictable; irrelavant;
Time annotated C source.
64 KB FRAM
50 software bugs per 1k lines!
binary level transformation
PIC by default (ASLR):
Binary patching: jmp detour;; e.g. DyInst
Process virtualization: switch address space during exe; e.g. DynamoRIO, PIN
Binary recompilation: shifting everything up/down;
Dynamics techniques to conquer :
Or, statically with sacrifices:
Under-approximate code, preserve layout. (most binary rewriting)
Use heuristics and speculative disassembly. (e.g., Ramblr)
Over-approximate code and pointers. (e.g., superset disassembly)
bin -> IR -> bin
recompiler passes
fewer heuristics
Egalitarian: binary transformation more equal with source level transformation; compile and defend itself.
Machine code <-> Egalito IR (=~ Machine specific IR) <-> Higher-level representation (=~ LLVM IR)
near zero overhead.
X86_64, ARM64, partial RISC-V support.
https://github.com/columbia/egalito
If you could revise
the fundmental principles of
computer system design
to improve security...
... what would you change?