Core ISel

References:

TargetPassConfig::addCoreISelPasses() will create the core passes needed for instruction selection in LLVM. It will

  1. choose one of three instruction selectors (FastISel, SelectionDAG, or GlobalISel) for the compilation, whichever is available or meets the configuration options.
  2. add finalization pass addPass(&FinalizeISelID);
    • to expand pseudo-instructions emitted by ISel.
  3. print and verify the instructions selected machine code: printAndVerify("After Instruction Selection");.
code TargetPassConfig::addCoreISelPasses()

```

addInstSelector() is target specific. For example, see MIPS ISel

  • Calling Conv

    • References: llvm/include/llvm/CodeGen/CallingConvLower.h llvm/lib/CodeGen/CallingConvLower.cpp class CCState. Holds information needed while lowering arguments and return values. It captures which registers are already assigned and which stack slots are used. It provides accessors to allocate these values.

  • DebugLoc

    • References llvm/include/llvm/CodeGen/SelectionDAGNodes.h: class SDLoc Two points where the debug location info is passed from IR to MIR: When an SDNode is created from the DAGBuilder, the DebugLoc is extracted from the original Instruction, and IROrder is the ordinal position of the instruction. When an SDNode is created after the DAG is being built, both DebugLoc and the IROrder are propagated from the original SDNode.

  • Selection Dag

    • References: llvm/include/llvm/CodeGen/SelectionDAGISel.h llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp LLVM Selection DAG Introduction Pass registration // llvm/lib/Target/Mips/MipsTargetMachine.cpp // Install an instruction selector pass using // the ISelDag to gen Mips code. bool MipsPassConfig::addInstSelector() { DebugLL("adding MipsModuleISelDagPass\n"); addPass(createMipsModuleISelDagPass()); DebugLL("adding Mips16ISelDag\n"); addPass(createMips16ISelDag(getMipsTargetMachine(), getOptLevel())); DebugLL("adding MipsSEISelDag\n"); addPass(createMipsSEISelDag(getMipsTargetMachine(), getOptLevel())); DebugLL("done adding MipsSEISelDag\n"); return false; } SelectionDAGISel::runOnMachineFunction() SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) SelectionDAGISel::runOnMachineFunction() bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) { DebugLL("SelectionDAGISel pass on MF: "<< mf.getName() << "\n"); CurDAG->init(*MF, *ORE, this, LibInfo, getAnalysisIfAvailable<LegacyDivergenceAnalysis>()); SDB->init(GFI, AA, LibInfo); // SDB: SelectionDAGBuilder MachineBasicBlock *EntryMBB = &MF->front(); /////////////////////////////////////////// // Do selection for all basic blocks.

  • MIPS ISel Passes

    • References: llvm/lib/Target/Mips/MipsTargetMachine.cpp 3 Passes for Mips ISel MipsModuleDAGToDAGISel, a pass used to change the subtarget for the Mips Instruction selector. Mips16DAGToDAGISel, Subclass of MipsDAGToDAGISel specialized for mips16. MipsSEDAGToDAGISel, Subclass of MipsDAGToDAGISel specialized for mips32/64. The core passes are Mips16DAGToDAGISel for 16-bit mips and MipsSEDAGToDAGISel for 32⁄64 bit mips. Both of them finally calls the parent pass entry (SelectionDAGISel::runOnMachineFunction) in their implementation. See more impl details on SelectionDAGISel.

  • GlobalISel

    • Reference: LLVM in progress: Global Instruction Selection Instruction Selection Reference LLVM Core Pipeline LLVM Core Pipleline – InstructionSelect InstructionSelect pass transforms generic machine instructions into equivalent target-specifc instructions. It traverses the MachineFunction bottom-up, selecting uses before definitions, enabling trivial dead code elimination. The target implements InstructionSelector class, containing target-specific selection logic. InstructionSelector::select virtual bool select(MachineInstr &MI) This method is responsible for mutating (or replacing) a possibly-generic MI into a fully target-specific equivalent.

Created Jul 22, 2020 // Last Updated Jul 22, 2020

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