References:
1.1 Introduction
Modern integrated circuits (ICs) are enormously complicated, sometimes containing billions of devices. The design of these ICs would not be humanly possible without software (SW) assistance at every stage of the process. The tools and methodologies used for this task are collectively called electronic design automation (EDA).
EDA tools span a very wide range, from logic-centric tools that implement and verify functionality to physically-aware tools that create blueprints for manufacturing and verify their feasibility. EDA methodologies combine multiple tools into EDA design flows, invoking the most appropriate software packages based on how the design progresses through optimizations. Modern EDA methodologies can reuse existing design blocks, develop new ones, and integrate entire systems. They not only automate the work of circuit engineers, but also process large amounts of heterogeneous design data, invoke more accurate analyses and more powerful optimizations than what human designers are capable of.
EDA工具是很多种类工具的集成，既包含以逻辑为中心的用于实现和验证逻辑功能的工具集，也包含可理解物理电路特性、可用于电路生产和电路可行性验证的工具。
在EDA的设计流程中，集成了多种工具并根据设计过程中的优化需求自动选择合适的工具做处理。
目前的EDA方案中，既包含已有的设计模块，也有新开发的模块，并把他们集成到整个EDA系统中。
他们不仅仅让电路相关工程实现自动化，也让多种多样的设计层面的数据实现自动处理，这使得EDA工具能够提供比人工更为准确和强大的优化能力。
As the number of design rules, number of layers, and chip size continued to increase, it became increasingly difficult to verify by hand that a layout met all the manufacturing rules and to estimate the parasitics of the circuit. … Increasing numbers of interconnect layers made the process more complex, and the original analytic approximations to R, C, and L values became inadequate, and new techniques for parasitic extraction were required to determine more accurate values, or at least calibrate the parameter extractors. (Chapter 20 and 25 of Volume 2)
The next bottleneck was in determining the precise location of each polygon and drawing its detailed geometry. Placement and routing programs for standard-cell designs allowed the user to specify only the gate-level netlist – the computer would then decide on the location of the gates and route the wires connecting them. This greatly improved productivity (with a moderate loss of silicon efficiency), making IC design accessible to a wider group of electronics engineers. (Chapter 5 and 8 of volume 2)
If you could revise
the fundmental principles of
computer system design
to improve security...
... what would you change?