IDT: interrupt descriptor table

Reference 1

static void cpu_startup(void *);
SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);

The Table

cpu_startup(void *dummy) in sys/mips/mips/machdep.c

–> cpu_init_interrupts();

cpu_init_interrupts()[sys/mips/mips/intr_machdep.c]: perform initialization of interrupts prior to setting handlings.

  • compose a name sintxx (2 soft_irqs), or intxx (6 hard_irqs);
  • call mips_intrcnt_create() to name the intrnames; increase the global counter intrcnt_index;

void mips_vector_init(void)[sys/mips/mips/machdep.c]: initialize the hardware exception vectors, and the jump table used to call locore cache and TLB management functions, based on the kind of CPU the kernel is running on.

  • copy TLB exception vector code to MIPS_UTLB_MISS_EXC_VEC(=0x8000,0000);
  • copy TLB exception vector code to MIPS_XTLB_MISS_EXC_VEC(=0x8000,0080);
  • copy MIPS exception vector code to MIPS_GEN_EXC_VEC (=0x8000,0180);
  • copy MIPS Cache vector code to MIPS_CACHE_ERR_EXC_VEC (=0x8000,0100);
  • (CHERI) copy MIPS exception vector code to CHERI_CCALL_EXC_VEC (=0x8000,0280);

The Trap Gates

sys/mips/mips/exception.S

MipsException: handles all exceptions except RESET and TLBMiss.

RESET

MipsTLBMiss: vector address 0x8000,0000

  1. FreeBSD kernel source. ↩
Created Oct 29, 2019 // Last Updated Oct 30, 2019

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